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Open Access

Fast Discrete Fourier Transform Computations Using the Reduced Adder Graph Technique

  • Uwe Meyer-Bäse1Email author,
  • Hariharan Natarajan1 and
  • Andrew G Dempster2
EURASIP Journal on Advances in Signal Processing20072007:067360

https://doi.org/10.1155/2007/67360

Received: 28 February 2006

Accepted: 17 December 2006

Published: 21 February 2007

Abstract

It has recently been shown that thse -dimensional reduced adder graph (RAG- ) technique is beneficial for many DSP applications such as for FIR and IIR filters, where multipliers can be grouped in multiplier blocks. This paper highlights the importance of DFT and FFT as DSP objects and also explores how the RAG- technique can be applied to these algorithms. This RAG- DFT will be shown to be of low complexity and possess an attractively regular VLSI data flow when implemented with the Rader DFT algorithm or the Bluestein chirp- algorithm. ASIC synthesis data are provided and demonstrate the low complexity and high speed of the design when compared to other alternatives.

Keywords

FourierFourier TransformInformation TechnologyQuantum InformationData Flow

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Authors’ Affiliations

(1)
Department of Electrical and Computer Engineering, Florida State University, Tallahassee, USA
(2)
School of Surveying and Spatial Information Systems, University of New South Wales, Sydney, Australia

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Copyright

© Meyer-Bäse et al. 2007

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