Open Access

Design and Implementation of Numerical Linear Algebra Algorithms on Fixed Point DSPs

EURASIP Journal on Advances in Signal Processing20072007:087046

https://doi.org/10.1155/2007/87046

Received: 29 September 2006

Accepted: 11 April 2007

Published: 5 July 2007

Abstract

Numerical linear algebra algorithms use the inherent elegance of matrix formulations and are usually implemented using C/C++ floating point representation. The system implementation is faced with practical constraints because these algorithms usually need to run in real time on fixed point digital signal processors (DSPs) to reduce total hardware costs. Converting the simulation model to fixed point arithmetic and then porting it to a target DSP device is a difficult and time-consuming process. In this paper, we analyze the conversion process. We transformed selected linear algebra algorithms from floating point to fixed point arithmetic, and compared real-time requirements and performance between the fixed point DSP and floating point DSP algorithm implementations. We also introduce an advanced code optimization and an implementation by DSP-specific, fixed point C code generation. By using the techniques described in the paper, speed can be increased by a factor of up to 10 compared to floating point emulation on fixed point hardware.

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Authors’ Affiliations

(1)
DSP Emerging End Equipment, Texas Instruments Inc
(2)
Coordinated Science Laboratory, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign
(3)
Application Specific Products, Texas Instruments Inc

References

  1. van Dooren P: Numerical aspects of system and control algorithms. Journal A 1989,30(1):25-32.MATHGoogle Scholar
  2. Jollife I: Principal Component Analysis. Springer, New York, NY, USA; 1986.View ArticleGoogle Scholar
  3. Grewal MS, Andrews AP: Kalman Filtering Theory and Practice, Prentice Hall Information and Systems Sciences Series. Prentice-Hall, Upper Saddle River, NJ, USA; 1993.Google Scholar
  4. Frantz G, Simar R: Comparing Fixed and Floating Point DSPs. SPRY061, Texas Instruments, 2004Google Scholar
  5. Kim S, Sung W: A floating-point to fixed-point assembly program translator for the TMS 320C25. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 1994,41(11):730-739. 10.1109/82.331543Google Scholar
  6. Simulink : Simulation and Model Based Design. Simulink Reference, Version 6, The Mathworks 2006Google Scholar
  7. IEEE Std 1666-2005 IEEE Standard SystemC Language Reference Manual http://standards.ieee.org/getieee/1666/download/1666-2005.pdf
  8. Matlab The Language of Technical Computing Function Reference, Version 7, The Mathworks 2006Google Scholar
  9. Coors M, Keding H, Lüthje O, Meyr H: Design and DSP implementation of fixed-point systems. EURASIP Journal on Applied Signal Processing 2002,2002(9):908-925. 10.1155/S1110865702205065View ArticleMATHGoogle Scholar
  10. Liu B: Effect of finite word length on the accuracy of digital filters—a review. IEEE Transactions on Circuit Theory 1971,18(6):670-677.View ArticleGoogle Scholar
  11. Kim S, Kum K-II, Sung W: Fixed-point optimization utility for C and C++ based digital signal processing programs. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 1998,45(11):1455-1464. 10.1109/82.735357View ArticleGoogle Scholar
  12. Gelb A: Applied Optimal Estimation. The MIT Press, Cambridge, Mass, USA; 1992.Google Scholar
  13. Aamodt T, Chow P: Numerical error minimizing floating point to fixed-point ANSI C compilation. The 1st Workshop on Media Processors and Digital Signal Processing (MP-DSP '99), November 1999, Haifa, Israel 3-12.Google Scholar
  14. Han K, Evans BL: Optimum word length search using sensitivity information. EURASIP Journal on Applied Signal Processing 2006, 2006: 14 pages.Google Scholar
  15. Shi C, Brodersen RW: Floating-point to fixed-point conversion with decision errors due to quantization. Proceedings of IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP '04), May 2004, Montreal, Que, Canada 5: 41-44.Google Scholar
  16. Golub G, van Loan C: Matrix Computations. Johns Hopkins University Press, Baltimore, Md, USA; 1996.MATHGoogle Scholar
  17. Golub G, Mitchell I: Matrix factorizations in fixed point on the C6x VLIW architecture. Stanford University, Stanford, Calif, USA, 1998Google Scholar
  18. Hedayat GA: Numerical linear algebra and computer architecture: an evolving interaction. In Tech. Rep. UMCS-93-1-5. Department of Computer Science, University of Manchester, Manchester, UK; 1993.Google Scholar
  19. Wadekar SA, Parker AC: Accuracy sensitive word length selection for algorithm optimization. Proceedings of IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD '98), October 1998, Austin, Tex, USA 54-61.Google Scholar
  20. Constantinides GA, Cheung PYK, Luk W: Word length optimization for linear digital signal processing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2003,22(10):1432-1442. 10.1109/TCAD.2003.818119View ArticleGoogle Scholar
  21. Stephenson M, Babb J, Amarasinghe S: Bit width analysis with application to silicon compilation. Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, June 2000, Vancouver, BC, Canada 108-120.Google Scholar
  22. Shi C, Brodersen RW: Automated fixed-point data-type optimization tool for signal processing and communication systems. Proceedings of 41st Annual Conference on Design Automation, June 2004, San Diego, Calif, USA 478-483.Google Scholar
  23. Nayak A, Haldar M, Choudhary A, Banerjee P: Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs. Proceedings of Design, Automation and Test in Europe, Conference and Exhibition (DATE '01), March 2001, Munich, Germany 722-728.Google Scholar
  24. Cmar R, Rijnders L, Schaumont P, Vernalde S, Bolsens I: A methodology and design environment for DSP ASIC fixed point refinement. Proceedings of Design, Automation and Test in Europe, Conference and Exhibition (DATE '99), March 1999, Munich, Germany 271-276.View ArticleGoogle Scholar
  25. Kamath S, Magotra N, Shrivastava A: Quantization analysis tool for fixed-point implementation of real time algorithms on the TMS320C5000. Proceedings of IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP '02), May 2002, Orlando, Fla, USA 4: 3784-3787.Google Scholar
  26. Han K, Evans BL: Word length optimization with complexity-and-distortion measure and its application to broadband wireless demodulator design. Proceedings of IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP '04), May 2004, Montreal, Que, Canada 5: 37-40.Google Scholar
  27. Jackson LB: On the interaction of the round-off noise and dynamic range in digital filters. The Bell System Technical Journal 1970,49(2):159-184.MathSciNetView ArticleMATHGoogle Scholar
  28. Mathews VJ, Xie Z: Fixed-point error analysis of stochastic gradient adaptive lattice filters. IEEE Transactions on Acoustics, Speech, and Signal Processing 1990,38(1):70-80. 10.1109/29.45619View ArticleGoogle Scholar
  29. Oppenheim AV, Schafer RW, Buck JR: Discrete-Time Signal Processing. Prentice-Hall, Upper Saddle River, NJ, USA; 1998.Google Scholar
  30. Press WH, Flannery BP, Teukolsky SA, Vetterling WT: Numerical Recipes in C: The Art of Scientific Computing. Cambridge University Press, Cambridge, UK; 1992.Google Scholar
  31. Cammack W, Paley M: Fixpt: a C++ method for development of fixed point digital signal processing algorithms. Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS '94), January 1994, Maui, Hawaii, USA 1: 87-95.Google Scholar
  32. TMS320C64/C64x+ DSP CPU and Instruction Set Reference Guide SPRU732C, Texas Instruments, August 2006, http://focus.ti.com/lit/ug/spru732c/spru732c.pdf
  33. TMS320C67x/C67x+ DSP CPU and Instruction Set Reference Guide SPRU733, Texas Instruments, May 2005Google Scholar
  34. Seshan N, Hiers T, Martinez G, Seely A, Nikolić Z: Digital signal processors for communications, video infrastructure, and audio. Proceedings of IEEE International SOC Conference (SOCC '05), September 2005, Herndon, Va, USA 319-321.Google Scholar
  35. TMS320C64x+ DSP Mega-module Reference Guide SPRU871, Texas Instruments, June 2007, http://focus.ti.com/lit/ug/spru871g/spru871g.pdf
  36. TMS320C6000 Programer's Guide SPRU198i, Texas Instruments, March 2006, http://focus.ti.com/lit/ug/spru198i/spru198i.pdf
  37. IQmath Librar : A Virtual Floating Point Engine, Module User's Guide C28x Foundation Software. version 1.4.1, Texas Instruments, 2002Google Scholar
  38. Granston E: Hand tuning loops and control code on the TMS320C6000. In Application Report SPRA666. Texas Instruments, Stafford, Tex, USA; 2006.Google Scholar
  39. Halleck J: Least squares network adjustments via QR factorization. Surveying and Land Information Systems 2001,61(2):113-122.Google Scholar

Copyright

© Zoran Nikolić et al. 2007

This article is published under license to BioMed Central Ltd. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.