Realization of Ternary Sigma-Delta Modulated Arithmetic Processing Modules
© A. Z. Sadik and P. J. O’Shea. 2009
Received: 22 May 2008
Accepted: 11 February 2009
Published: 16 March 2009
Sigma-delta modulated systems have a number of very appealing properties and are, therefore, heavily used in analog to digital converters, amplifiers, and modulators. This paper presents new results which indicate that they may also have significant potential for general purpose arithmetic processing. The paper introduces new arithmetic processing structures for ternary (i.e., +1, 0, or ) sigma-delta modulated signals. Simulations show that these new structures can be implemented very efficiently and have relatively good accuracy.
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