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Table 3 Synthesis metrics. Specifications for data matrices of size and two Band-Toeplitz PSF matrices of the same pixel size with equal bandwidths of 2 3 and 2 3.

From: Experiment Design Regularization-Based Hardware/Software Codesign for Real-Time Enhanced Imaging in Uncertain Remote Sensing Environment

Synthesis metrics Systolic array coprocessors   
  MSF PSM Iterative POCS
Number of slices 905 (5.89%)c 242 (1.57%) 216 (1.41%)
Number of aDSP'48 192 (100%) 9 (4.68%) 12 (6.25%)
Number of bLUTs 932 (3.03%)
Number of flip-flops 1845 (6.01%) 480 (1.56%) 432 (1.40%)
Maximum frequency 115.30 MHz 152.20 MHz 148.69 MHz
Maximum pin delay 8.67 ns 6.57 ns 6.72 ns
  1. aDSP'48are dedicated DSP blocks in high-end FPGAs – such as the Xilinx XtremeDSP slice in Virtex-4[18].
  2. bLUTsis an acronym to Look Up Tables structures.
  3. in parenthesis(.)report the percentages of the occupied HW resources related to the particular synthesis metrics in terms of the total available on the relevant device.