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  • Research Article
  • Open Access

Scalable IC Platform for Smart Cameras

  • 1Email author,
  • 1,
  • 1 and
  • 1
EURASIP Journal on Advances in Signal Processing20052005:706124

https://doi.org/10.1155/ASP.2005.2018

  • Received: 19 December 2003
  • Published:

Abstract

Smart cameras are among the emerging new fields of electronics. The points of interest are in the application areas, software and IC development. In order to reduce cost, it is worthwhile to invest in a single architecture that can be scaled for the various application areas in performance (and resulting power consumption). In this paper, we show that the combination of an SIMD (single-instruction multiple-data) processor and a general-purpose DSP is very advantageous for the image processing tasks encountered in smart cameras. While the SIMD processor gives the very high performance necessary by exploiting the inherent data parallelism found in the pixel crunching part of the algorithms, the DSP offers a friendly approach to the more complex tasks. The paper continues to motivate that SIMD processors have very convenient scaling properties in silicon, making the complete, SIMD-DSP architecture suitable for different application areas without changing the software suite. Analysis of the changes in power consumption due to scaling shows that for typical image processing tasks, it is beneficial to scale the SIMD processor to use the maximum level of parallelism available in the algorithm if the IC supply voltage can be lowered. If silicon cost is of importance, the parallelism of the processor should be scaled to just reach the desired performance given the speed of the silicon.

Keywords and phrases

  • smart cameras
  • IC architectures
  • image processing
  • SIMD
  • parallel processing
  • architecture scaling

Authors’ Affiliations

(1)
Philips Research Laboratories, Professor Holstlaan 4, Eindhoven, 5656 AA, The Netherlands

Copyright

© Kleihorst et al. 2005

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