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  • Research Article
  • Open Access

Multiplierless Implementation of Rotators and FFTs

EURASIP Journal on Advances in Signal Processing20052005:105197

https://doi.org/10.1155/ASP.2005.2903

  • Received: 9 December 2004
  • Published:

Abstract

Complex rotators are used in many important signal processing applications, including Cooley-Tukey and split-radix FFT algorithms. This paper presents methods for designing multiplierless implementations of fixed-point rotators and FFTs, in which multiplications are replaced by additions, subtractions, and shifts. These methods minimise the adder-cost (the number of additions and subtractions), while achieving a specified level of accuracy. FFT designs based on multiplierless rotators are compared with designs based on the multiplierless implementation of DFT matrix multiplication. These techniques make possible VLSI implementations of rotators and FFTs which could achieve very high speed and/or power efficiency. The methods can be used to provide any chosen accuracy; examples are presented for 12 to 26 bit accuracy. On average, rotators are shown to be implementable using 10, 12, or 15 adders to achieve accuracies of 12, 16, or 20 bits, respectively.

Keywords and phrases:

  • FFT implementation
  • rotator implementation
  • multiplierless design
  • VLSI

Authors’ Affiliations

(1)
QinetiQ Ltd., St. Andrews Road, Worcestershire, Malvern, WR14 3PS, UK

Copyright

© Malcolm D. Macleod 2005

This article is published under license to BioMed Central Ltd. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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