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A New Pipelined Systolic Array-Based Architecture for Matrix Inversion in FPGAs with Kalman Filter Case Study

Abstract

A new pipelined systolic array-based (PSA) architecture for matrix inversion is proposed. The pipelined systolic array (PSA) architecture is suitable for FPGA implementations as it efficiently uses available resources of an FPGA. It is scalable for different matrix size and as such allows employing parameterisation that makes it suitable for customisation for application-specific needs. This new architecture has an advantage of processing element complexity, compared to the in other systolic array structures, where the size of the input matrix is given by. The use of the PSA architecture for Kalman filter as an implementation example, which requires different structures for different number of states, is illustrated. The resulting precision error is analysed and shown to be negligible.

References

  1. 1.

    Irwin GW: Parallel algorithms for control. Control Engineering Practice 1993, 1(4):635–643. 10.1016/0967-0661(93)91387-C

    Article  Google Scholar 

  2. 2.

    Ceschia M, Bellato M, Paccagnella A, Kaminski A: Ion beam testing of ALTERA APEX FPGAs. Proceedings of IEEE Radiation Effects Data Workshop, July 2002, Phoenix, Ariz, USA 45–50.

    Google Scholar 

  3. 3.

    El-Amawy A: A systolic architecture for fast dense matrix inversion. IEEE Transactions on Computers 1989, 38(3):449–455. 10.1109/12.21131

    MathSciNet  Article  Google Scholar 

  4. 4.

    Ghosh AK, Paparao P: Performance of modified Faddeev algorithm on optical processors. IEE Proceedings. J: Optoelectronics 1992, 139(5):325–330. 10.1049/ip-j.1992.0056

    Google Scholar 

  5. 5.

    Zajc M, Sernec R, Tasic J: An efficient linear algebra SoC design: implementation considerations. Proceedings of 11th Mediterranean Electrotechnical Conference (MELECON '02), May 2002, Cairo, Egypt 322–326.

    Google Scholar 

  6. 6.

    Gaston FMF, Irwin GW: Systolic Kalman filtering: an overview. IEE Proceedings. D: Control Theory & Applications 1990, 137(4):235–244. 10.1049/ip-d.1990.0029

    Article  Google Scholar 

  7. 7.

    Gaston FMF, Brown DW, Kadlec J: A parallel predictive controller. Proceedings of UKACC International Conference on Control, September 1996, Exeter, UK 2: 1070–1075.

    Article  Google Scholar 

  8. 8.

    El-Amawy A, Dharmarajan KR: Parallel VLSI algorithm for stable inversion of dense matrices. IEE Proceedings. E: Computers and Digital Techniques 1989, 136(6):575–580. 10.1049/ip-e.1989.0079

    MATH  Google Scholar 

  9. 9.

    Faroughi N, Shanblatt MA: An improved systematic method for constructing systolic arrays from algorithms. Proceedings of 24th ACM/IEEE Design Automation Conference (DAC '87), June–July 1987, Miami Beach, Fla, USA 26–34.

    Google Scholar 

  10. 10.

    Chen S-G, Lee J-C, Li C-C: Systolic implementation of Kalman filter. Proceedings of IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS '94), December 1994, Taipei, Taiwan 97–102.

    Google Scholar 

  11. 11.

    Salcic Z, Lee C-R: Scalar-based direct algorithm mapping FPLD implementation of a Kalman filter. IEEE Transactions on Aerospace and Electronic Systems 2000, 36(3, part 1):879–888. 10.1109/7.869507

    Article  Google Scholar 

  12. 12.

    Lawrie D, Fleming P: Fine-grain parallel processing implementations of Kalman filter algorithms. Proceedings of International Conference on Control, March 1991, Edinburgh, Scotland, UK 2: 867–870.

    MathSciNet  Google Scholar 

  13. 13.

    Mitra SK: Digital Signal Processing: A Computer-Based Approach. 2nd edition. McGraw-Hill/Irwin, Boston, Mass, USA; 2001.

    Google Scholar 

  14. 14.

    Kalman RE: A new approach to linear filtering and prediction problems. Transaction of the ASME, Series D, Journal of Basic Engineering 1960, 82: 35–45. 10.1115/1.3662552

    Article  Google Scholar 

  15. 15.

    Vaseghi SV: Advanced Digital Signal Processing and Noise Reduction. 2nd edition. John Wiley & Sons, New York, NY, USA; 2000.

    Google Scholar 

  16. 16.

    Kamen EW, Su JK: Introduction to Optimal Estimation. Springer, London, UK; 1999.

    Google Scholar 

  17. 17.

    Swanson DC: Signal Processing for Intelligent Sensor Systems. Marcel Dekker, New York, NY, USA; 2000.

    Google Scholar 

  18. 18.

    Lee C-R: FPLD implementation and customisation in multiple target tracking applications, Engineering Ph.D. thesis. the University of Auckland, Auckland, New Zealand; 1998.

    Google Scholar 

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Correspondence to Abbas Bigdeli.

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Bigdeli, A., Biglari-Abhari, M., Salcic, Z. et al. A New Pipelined Systolic Array-Based Architecture for Matrix Inversion in FPGAs with Kalman Filter Case Study. EURASIP J. Adv. Signal Process. 2006, 089186 (2006). https://doi.org/10.1155/ASP/2006/89186

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Keywords

  • Information Technology
  • Quantum Information
  • Kalman Filter
  • Processing Element
  • Matrix Size