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  • Research Article
  • Open Access

Floating-to-Fixed-Point Conversion for Digital Signal Processors

EURASIP Journal on Advances in Signal Processing20062006:096421

https://doi.org/10.1155/ASP/2006/96421

  • Received: 1 October 2004
  • Accepted: 12 July 2005
  • Published:

Abstract

Digital signal processing applications are specified with floating-point data types but they are usually implemented in embedded systems with fixed-point arithmetic to minimise cost and power consumption. Thus, methodologies which establish automatically the fixed-point specification are required to reduce the application time-to-market. In this paper, a new methodology for the floating-to-fixed point conversion is proposed for software implementations. The aim of our approach is to determine the fixed-point specification which minimises the code execution time for a given accuracy constraint. Compared to previous methodologies, our approach takes into account the DSP architecture to optimise the fixed-point formats and the floating-to-fixed-point conversion process is coupled with the code generation process. The fixed-point data types and the position of the scaling operations are optimised to reduce the code execution time. To evaluate the fixed-point computation accuracy, an analytical approach is used to reduce the optimisation time compared to the existing methods based on simulation. The methodology stages are described and several experiment results are presented to underline the efficiency of this approach.

Keywords

  • Digital Signal
  • Digital Signal Processing
  • Digital Signal Processor
  • Signal Processing Application
  • Point Conversion

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Authors’ Affiliations

(1)
R2D2 Team (IRISA), ENSSAT, University of Rennes I, 6 rue de Kerampont, Lannion, 22300, France

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