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EURASIP Journal on Advances in Signal Processing
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A Class of High-Rate Low-Complexity Error-Detecting RLL Codes

EURASIP Journal on Advances in Signal Processing volume 2001, Article number: 690150 (2001) Cite this article

Abstract

We present a new methodology for the construction of high-rate channel modulation run-length-limited RLL codes. Simple modulation encoders and decoders are constructed, with low error propagation during decoding. They combine partial error detection capability (PED) to boost the performance of a concatenated outer Error Correction Code (ECC) [1]. Moreover, current systems are using low redundancy ECC, and the overall rate is mainly determined by the inner modulation code rate, which critically is to be maintained high. Code rates, for example, 16/17, 24/25 and higher are achievable, with efficiency exceeding 0.94 and 0.96, respectively. The proposed fixed length block decodable codes, are generalized schemes of the type for.

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  1. Texas Instruments, Inc., Dallas, TX, 75243, USA

    Anthony G. Bessios

  2. Agere Systems, Milpitas, CA, 95035, USA

    Anthony G. Bessios

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  1. Anthony G. Bessios
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Correspondence to Anthony G. Bessios.

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Bessios, A.G. A Class of High-Rate Low-Complexity Error-Detecting RLL Codes. EURASIP J. Adv. Signal Process. 2001, 690150 (2001). https://doi.org/10.1155/S1110865701000233

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  • DOI: https://doi.org/10.1155/S1110865701000233

Keywords

  • run-length-limited constrained codes