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Table 3 Power and area for design reported by synopsys design compiler

From: A sigma–delta analog to digital converter based on iterative algorithm

Cell Internal Power

153.3550μ W

(58%)

Net Switching Power

111.8264μ W

(42%)

Total Dynamic Power

265.1814μ W

(100%)

Cell Leakage Power

7.3691μ W

 

Total cell area

2652.120016 nm2