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Table 4 Worst case throughputs of proposed architectures (M = 64)

From: Proposed hardware architectures of particle filter for object tracking

HW implementation Worst case Maximum clock frequency (MHz) Throughput
The two-step architecture with parallel resampling 132 cycle 36 270 × 103 iterations/s
The distributed PF 93 cycle 74 795 × 103 iterations/s