Figure 10From: Verify level control criteria for multi-level cell flash memories and their applicationsComparison between the overall WER from criterion1 and from criterion 2 for 2-bit/cell, 3-bit/cell and 4-bit/cell. The BCH code (n = 8752, k = 8192, t = 40) is applied. The constrained voltage window W is assumed to be 5.Back to article page