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Table 5 ECC scheme for STT-RAM and PRAM to achieve the target BFR

From: Improving reliability of non-volatile memory technologies through circuit level techniques and error control coding

  512 bits 1024 bits 2048 bits
STT-RAM BCH(542,512) BCH(1057,1024) BCH(2084,2048)
PRAM BCH(552,512) BCH(1079,1024) BCH(2120,2048)