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Table 4 Achieved improvements for the Foreman test bench[26]

From: Acceleration of block-matching algorithms using a custom instruction-based paradigm on a Nios II microprocessor

Technique

Microprocessor

Nios II/e

Nios II/s

Nios II/f

MB 16

MB 32

MB 64

MB 16

MB 32

MB 64

MB 16

MB 32

MB 64

FST

8 pixels

41.72%

41.88%

32.23%

20.02 %

16.73%

15.84%

39.74%

36.22%

9.13%

16 pixels

42.58%

42.90%

33.29%

21.08%

18.86%

17.91%

50.22%

44.96%

11.15%

32 pixels

44.23%

43.21%

33.62%

21.61%

18.99%

18.42%

54.00%

53.85%

11.49%

2DLOG

8 pixels

32.35%

27.63%

20.63%

8.78%

7.25%

4.20%

6.36%

5.15%

4.13%

16 pixels

34.05%

30.05%

23.31%

11.63%

6.54%

3.94%

4.63%

8.00%

4.65%

32 pixels

35.45%

35.46%

25.61%

10.11%

10.33%

11.24%

5.50%

14.91%

5.39%

TSST

8 pixels

34.97%

33.46%

26.18%

11.24%

10.56%

8.98%

0.93%

11.21%

4.71%

16 pixels

34.67%

33.14%

26.50%

11.11%

9.44%

9.52%

4.42%

11.21%

4.12%

32 pixels

34.37%

33.46%

25.79%

9.55%

10.22%

8.77%

~0.00%

11.21%

7.39%