The super-heterodyne radio receiver. The super-heterodyne radio receiver with RF stage and one IF-stage. The first AGC loop operates in the RF stage in order to prevent the RF-amplifier (i.e., RF VGA circuit) from overloading the RF-mixer (down-converter). The second AGC loop operates in the baseband domain and sets the IF-gain of the IF-amplifier (i.e., IF VGA) to scale the signal input for the A/D conversion. Each AGC loop consists of the following building blocks: VGA, detector and comparator. In case of a super-heterodyne spectrum analyzer the principle is the same as for the radio receiver case with the addition that the oscillators are driven by a ramp generator to sweep through the frequency range.