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Table 5 Comparison of conventional and DAA-based designs at 20 MHz

From: Low power reconfigurable FP-FFT core with an array of folded DA butterflies

Parameter DFPABF Conventional BF Percentage saving Proposed FFT processor Conventional BF-based processor Percentage saving
Maximum frequency (MHz) 100 20 100 20
No. of cells 18,074 46,886 61.45 245,452 571,590 57.06
Area (mm 2 ) 0.031 0.055 43.64 0.694 1.04 33.27
Leakage power (nw) 1,318 2,711 51.38 26,574 48,679 45.41
Total power at 20 MHz (mW) 0.9878 4.937 79.99 28.9 46.85 38.31
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