TY - BOOK AU - Schleher, D. C. PY - 1991 DA - 1991// TI - MTI and Pulsed Doppler Radar PB - Artech House, Inc CY - Norwood, MA ID - Schleher1991 ER - TY - CHAP AU - Bahtat, M. AU - Belkouch, S. AU - Elleaume, P. AU - Le Gall, P. PY - 2012 DA - 2012// TI - Efficient implementation scheme of a real-time radar beamformer on a VLIW DSP processor, TMS320C66x TI DSP implementation BT - 2012 International Conference on Complex Systems (ICCS) PB - IEEE CY - Agadir, Morocco UR - https://doi.org/10.1109/ICoCS.2012.6458555 DO - 10.1109/ICoCS.2012.6458555 ID - Bahtat2012 ER - TY - CHAP AU - Bueno, D. AU - Conger, C. AU - Leko, A. AU - Troxel, I. AU - George, A. D. PY - 2004 DA - 2004// TI - Virtual prototyping and performance analysis of RapidIO-based system architectures for space-based radar BT - Eighth Annual Workshop on High-Performance Embedded Computing (HPEC) PB - Massachusetts Institute of Technology Lincoln Laboratory CY - Lexington, MA, USA ID - Bueno2004 ER - TY - STD TI - TMS320C6678 Multicore Fixed and Floating-Point Digital Signal Processor. USA: Texas Instruments; 2014. http://www.ti.com/lit/ds/symlink/tms320c6678.pdf UR - http://www.ti.com/lit/ds/symlink/tms320c6678.pdf ID - ref4 ER - TY - CHAP AU - Yang, G. AU - Bakos, J. D. PY - 2013 DA - 2013// TI - Sparse matrix–vector multiply on the Texas Instruments C6678 digital signal processor BT - 2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP) PB - IEEE CY - Washington, DC, USA ID - Yang2013 ER - TY - CHAP AU - Mego, R. AU - Fryza, T. PY - 2013 DA - 2013// TI - Performance of parallel algorithms using OpenMP BT - 2013 23rd International Conference on Radioelektronika (RADIOELEKTRONIKA) PB - IEEE CY - Pardubice, Czech Republic UR - https://doi.org/10.1109/RadioElek.2013.6530923 DO - 10.1109/RadioElek.2013.6530923 ID - Mego2013 ER - TY - CHAP AU - ZhenHuan, Z. AU - Wei, H. AU - Yan, T. AU - DaWei, Y. AU - XianHong, W. PY - 2012 DA - 2012// TI - A design of versatile image processing platform based on the dual multi-core DSP and FPGA BT - 2012 Fifth International Symposium on Computational Intelligence and Design (ISCID) PB - IEEE CY - Hangzhou, China ID - ZhenHuan2012 ER - TY - CHAP AU - Ali, M. AU - Stotzer, E. AU - Igual, F. D. AU - van de Geijn, R. A. PY - 2012 DA - 2012// TI - Level-3 BLAS on the TI C6678 multi-core DSP BT - 2012 IEEE 24th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD) PB - IEEE CY - New York, NY, USA UR - https://doi.org/10.1109/SBAC-PAD.2012.26 DO - 10.1109/SBAC-PAD.2012.26 ID - Ali2012 ER - TY - CHAP AU - Min, W. AU - Xiu-qin, S. PY - 2012 DA - 2012// TI - The design of high performance tracking system based on multi C6678 BT - 2012 5th International Congress on Image and Signal Processing (CISP) PB - IEEE CY - Chongqing, Sichuan, China ID - Min2012 ER - TY - CHAP AU - Dan, W. AU - Ali, M. PY - 2012 DA - 2012// TI - Synthetic aperture radar on low power multi-core digital signal processor BT - 2012 IEEE Conference on High Performance Extreme Computing (HPEC) PB - IEEE CY - Waltham, MA, USA UR - https://doi.org/10.1109/HiPC.2012.6507524 DO - 10.1109/HiPC.2012.6507524 ID - Dan2012 ER - TY - CHAP AU - Chengfei, G. AU - Xiangyang, L. AU - Wenge, C. AU - Gaowei, J. AU - Haishan, T. PY - 2012 DA - 2012// TI - Matrix transposition based on C6678 BT - 2012 5th Global Symposium on Millimeter Waves (GSMM) PB - IEEE CY - Harbin, Heilongjiang, China ID - Chengfei2012 ER - TY - CHAP AU - Klilou, A. AU - Belkouch, S. AU - Elleaume, P. AU - Le Gall, P. AU - Bourzeix, F. AU - Hassani, M. M. PY - 2012 DA - 2012// TI - Performance optimization of high-speed interconnect SRIO for onboard processing BT - 2012 International Conference on Complex Systems (ICCS) PB - IEEE CY - Agadir, Morocco UR - https://doi.org/10.1109/ICoCS.2012.6458545 DO - 10.1109/ICoCS.2012.6458545 ID - Klilou2012 ER - TY - STD TI - RapidIO Interconnect Specification, LP-Serial Physical Layer Specification Rev. 2.1. Austin, TX, USA: RapidIO Trade Association; 2009. ID - ref13 ER - TY - CHAP AU - Adams, J. AU - Katsinis, C. AU - Rosen, W. AU - Hecht, D. AU - Adams, V. AU - Narravula, H. V. AU - Sukhtankar, S. AU - Lachenmaier, R. PY - 2001 DA - 2001// TI - Simulation experiments of a high-performance RapidIO-based processing architecture BT - IEEE International Symposium on Network Computing and Applications, 2001 (NCA 2001, 2001) PB - IEEE CY - Cambridge, MA, USA ID - Adams2001 ER - TY - CHAP AU - Zhang, X. AU - Liu, G. AU - Gao, M. PY - 2008 DA - 2008// TI - A high-performance scalable computing system for real-time signal processing applications BT - Congress on Image and Signal Processing, 2008 (CISP '08, 2008) PB - IEEE CY - Sanya, China UR - https://doi.org/10.1109/CISP.2008.44 DO - 10.1109/CISP.2008.44 ID - Zhang2008 ER - TY - CHAP AU - Zhang, X. AU - Gao, M. AU - Liu, G. PY - 2008 DA - 2008// TI - A scalable heterogeneous multi-processor signal processing system based on the RapidIO interconnect BT - International Symposium on Intelligent Information Technology Application Workshops, 2008 (IITAW '08, 2008) PB - IEEE CY - Shanghai, China UR - https://doi.org/10.1109/IITA.Workshops.2008.61 DO - 10.1109/IITA.Workshops.2008.61 ID - Zhang2008 ER - TY - CHAP AU - Changrui, W. AU - Fan, C. AU - Huizhi, C. PY - 2010 DA - 2010// TI - A high-performance heterogeneous embedded signal processing system based on Serial RapidIO interconnection BT - 2010 3rd IEEE International Conference on Computer Science and Information Technology (ICCSIT) PB - IEEE CY - Chengdu, China UR - https://doi.org/10.1109/ICCSIT.2010.5564987 DO - 10.1109/ICCSIT.2010.5564987 ID - Changrui2010 ER - TY - CHAP AU - Zhang, Y. AU - Wang, Y. AU - Zhang, P. PY - 2010 DA - 2010// TI - A high-performance scalable computing system on the RapidIO interconnect architecture BT - 2010 International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery (CyberC) PB - IEEE CY - Huangshan, China UR - https://doi.org/10.1109/CyberC.2010.59 DO - 10.1109/CyberC.2010.59 ID - Zhang2010 ER - TY - CHAP AU - Zhang, J. AU - Hb, S. AU - Q-z, W. AU - Zhang, J. PY - 2009 DA - 2009// TI - Research and implement of SRIO based on Mul-DSP BT - Conference on Computational Intelligence and Software Engineering PB - IEEE CY - Wuhan, China ID - Zhang2009 ER - TY - CHAP AU - Xue, S. AU - Wang, J. AU - Li, Y. AU - Peng, Q. PY - 2011 DA - 2011// TI - Parallel FFT implementation based on multi-core DSPs BT - 2011 International Conference on Computational Problem-Solving (ICCP) PB - IEEE CY - Chengdu, China UR - https://doi.org/10.1109/ICCPS.2011.6092292 DO - 10.1109/ICCPS.2011.6092292 ID - Xue2011 ER - TY - CHAP AU - Bueno, D. AU - Conger, C. AU - Leko, A. AU - Troxel, I. AU - George, A. D. PY - 2005 DA - 2005// TI - RapidIO-based space system architectures for synthetic aperture radar and ground moving target indicator BT - Ninth Annual Workshop on High-Performance Embedded Computing (HPEC) PB - Massachusetts Institute of Technology Lincoln Laboratory CY - Lexington, MA, USA ID - Bueno2005 ER - TY - CHAP AU - Bueno, D. AU - Leko, A. AU - Conger, C. AU - Troxel, I. AU - George, A. D. PY - 2004 DA - 2004// TI - Simulative analysis of the RapidIO embedded interconnect architecture for real-time, network-intensive applications BT - 29th Annual IEEE International Conference on Local Computer Networks (LCN) via the IEEE Workshop on High-Speed Local Networks (HSLN) PB - IEEE CY - Tampa, Florida, USA UR - https://doi.org/10.1109/LCN.2004.116 DO - 10.1109/LCN.2004.116 ID - Bueno2004 ER - TY - CHAP AU - Conger, C. AU - Bueno, D. AU - George, A. D. PY - 2006 DA - 2006// TI - Experimental analysis of multi-FPGA architectures over RapidIO for space-based radar processing BT - Tenth Annual Workshop on High-Performance Embedded Computing (HPEC) PB - Massachusetts Institute of Technology Lincoln Laboratory CY - Lexington, MA, USA ID - Conger2006 ER - TY - JOUR AU - Bueno, D. AU - Conger, C. AU - George, A. D. AU - Troxel, I. AU - Leko, A. PY - 2007 DA - 2007// TI - RapidIO for radar processing in advanced space systems JO - ACM Trans. Embed. Comput. Syst VL - 7 UR - https://doi.org/10.1145/1324969.1324970 DO - 10.1145/1324969.1324970 ID - Bueno2007 ER - TY - JOUR AU - Bueno, D. AU - Conger, C. AU - George, A. D. PY - 2010 DA - 2010// TI - Optimizing RapidIO architectures for onboard processing JO - ACM Trans. Embed. Comput. Syst VL - 9 UR - https://doi.org/10.1145/1698772.1698776 DO - 10.1145/1698772.1698776 ID - Bueno2010 ER - TY - CHAP AU - Schorcht, G. AU - Troxel, I. AU - Farhangian, K. AU - Unger, P. AU - Zinn, D. AU - Mick, C. K. AU - George, A. AU - Salzwedel, H. PY - 2003 DA - 2003// TI - System-level simulation modeling with MLDesigner BT - 11th IEEE/ACM International Symposium on Modeling, Analysis and Simulation of Computer Telecommunications Systems, 2003 (MASCOTS 2003, 2003) PB - IEEE CY - Orlando, FL, USA UR - https://doi.org/10.1109/MASCOT.2003.1240659 DO - 10.1109/MASCOT.2003.1240659 ID - Schorcht2003 ER - TY - JOUR AU - Brookner, E. PY - 1985 DA - 1985// TI - Phased-array radar JO - Sci. Am VL - 252 UR - https://doi.org/10.1038/scientificamerican0285-94 DO - 10.1038/scientificamerican0285-94 ID - Brookner1985 ER - TY - JOUR AU - Van Veen, B. D. AU - Buckley, K. M. PY - 1988 DA - 1988// TI - Beamforming: a versatile approach to spatial filtering JO - IEEE ASSP Mag VL - 5 UR - https://doi.org/10.1109/53.665 DO - 10.1109/53.665 ID - Van Veen1988 ER - TY - BOOK AU - Peebles, P. Z. PY - 1998 DA - 1998// TI - Radar Principles (Wiley-India ID - Peebles1998 ER - TY - CHAP AU - Bin Khalid, F. AU - Amjad, R. A. AU - Chohan, M. A. AU - Khizar, M. M. PY - 2012 DA - 2012// TI - FPGA based real-time signal processor for Pulse Doppler radar BT - 2012 International Conference on Informatics, Electronics & Vision (ICIEV) PB - IEEE CY - Dhaka, Bangladesh UR - https://doi.org/10.1109/ICIEV.2012.6317426 DO - 10.1109/ICIEV.2012.6317426 ID - Bin Khalid2012 ER - TY - CHAP AU - Izumi, H. AU - Sasaki, K. AU - Nakajima, K. AU - Sato, H. PY - 2002 DA - 2002// TI - An efficient technique for corner-turn in SAR image reconstruction by improving cache access BT - Proceedings International Symposium on Parallel and Distributed Processing (IPDPS 2002, 2002) PB - IEEE CY - Ft. Lauderdale, FL, USA ID - Izumi2002 ER - TY - STD TI - TMDXEVM6678L EVM Technical Reference Manual Version 2.0. USA: Texas Instruments; 2011. http://wfcache.advantech.com/support/TMDXEVM6678L_Technical_Reference_Manual_2V00.pdf UR - http://wfcache.advantech.com/support/TMDXEVM6678L_Technical_Reference_Manual_2V00.pdf ID - ref32 ER - TY - CHAP AU - Scheckel, T. PY - 2005 DA - 2005// TI - Serial RapidlO: Benefiting system interconnects BT - IEEE International SOC Conference, 2005 PB - IEEE CY - Herndon, VA, USA UR - https://doi.org/10.1109/SOCC.2005.1554519 DO - 10.1109/SOCC.2005.1554519 ID - Scheckel2005 ER - TY - STD TI - KeyStone Architecture Serial RapidIO (SRIO) User Guide. USA: Texas Instruments; 2012. http://www.ti.com/lit/ug/sprugw1b/sprugw1b.pdf UR - http://www.ti.com/lit/ug/sprugw1b/sprugw1b.pdf ID - ref34 ER - TY - STD TI - S-RIO Development Platform Gen2. USA: Silicon Turnkey Express; 2011. http://silicontkx.com/pdfs/SRDP2.pdf UR - http://silicontkx.com/pdfs/SRDP2.pdf ID - ref35 ER -