From: An optimised twin precision multiplier for ASIC environment
Sum bit | Twin 2009 [ 2 ] | Proposed twin signal selection |
---|---|---|
S15 | No change | No change |
S14 | No change | No change |
S13 | No change | No change |
S12 | 1/0 | 1 |
S11 | aMSP1/1 | No change |
S10 | PLSB3/P43 | P81/neg3 |
S9 | aMSP0/1 | No change |
S8 | PLSB2/P42 and 0/1 | P23/neg2 |
S7 | 0/a3 | P51/1 |
S6 | P41/\( \overline{P41} \) | P41/\( \overline{P41} \) |
S5 | 1/a2 | P31/1 |
S4 | 1/0 and P40/\( \overline{P40} \) | P02/1 and P40/\( \overline{P40} \) |
S3 | No change | No change |
S2 | No change | No change |
S1 | No change | No change |
S0 | No change | No change |