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Fig. 2 | EURASIP Journal on Advances in Signal Processing

Fig. 2

From: An efficient interpolation filter VLSI architecture for HEVC standard

Fig. 2

The improved luma interpolation algorithm. The top-level block diagram of our proposed fast interpolation algorithm. If the size of input PU is 4 × 8, 4 × 16, 8 × 4, 16 × 4, 16 × 12, or 12 × 16, the interpolation process of this PU will be skipped. The interpolation process includes half-pixel interpolation, MV cost calculation, best half MV determination, and quarter-pixel interpolation

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