Skip to main content
Fig. 3 | EURASIP Journal on Advances in Signal Processing

Fig. 3

From: An efficient interpolation filter VLSI architecture for HEVC standard

Fig. 3

The reused data path of interpolation filter. a First round: half-pixel interpolation. b Second round: quarter-pixel interpolation. The reused data path of the interpolation processor. a The data path of the first round of interpolation processor for half-pixel interpolation. b The data path of the second round of interpolation processor for quarter-pixel interpolation. H_F1/4, H_F2/4, and H_F3/4 in level 1 represent three horizontal filters. V_F1/4, V_F2/4, and V_F3/4 in level 2 and level 3 represent eight vertical filters. MUX represents multiplexor

Back to article page