Fig. 6
From: An efficient interpolation filter VLSI architecture for HEVC standard
The proposed architectures of A and B type filters. a A type. b B type. Shows the proposed optimal architecture of A and B type filters. a The architecture of A type filters. b The architecture of B type filters. A, B, C, D, E, F, G, and H represent eight input reference pixels. “<<1” and “<<2” represent shifters. “+” represents adder. “−1” represents “multiplied by minus one”