Dynamic configuration management of a multi-standard and multi-mode reconfigurable multi-ASIP architecture for turbo decoding

EURASIP Journal on Advances in Signal Processing

Table 4 Maximum throughput of the reconfigurable UDec platform with 64 RDecASIPs, N _instr = 4, F _clk = 500 MHz

Number of decoding iterations	Max. throughput (in Mbps)
	Serial decoding	Shuffled decoding
4	1000	2000
6	667	1334
7	571	1142
8	500	1000
9	444	888
10	400	800
12	333	666
16	250	500
20	200	400