From: Cost-effective multi-standard video transform core using time-sharing architecture
Methods | [7] | [8] | [9] | [13] | [15] | Proposed | |
---|---|---|---|---|---|---|---|
Technology (nm) | 90 | 180 | 180 | 130 | FPGA | 90 | |
Method/architecture | Two 1-D + TMEM | Two 1-D + TMEM | Two 1-D + TMEM | Two 1-D + TMEM | One 1-D + TMEM | Two 1-D + TMEM | |
Supports standards | MPEG | X | V | V | V | V | V |
 | H.264 | X | V | V | V | V | V |
 | VC-1 | X | V | V | V | X | V |
 | HEVC | V | X | X | X | X | O |
Gate counts (K) | 347 | 95.1 | 120 | 31.8 | 50 | 27.2 | |
Frequency (MHz) | 187 | 125 | 125 | 136 | 80 | 200 | |
Normalized freq. | 187 | 364 | 364 | 178 | N/A | 200 MHz | |
Throughput (G-pels/s) | 6.00 | 1.00 | 1.00 | > 0.05 | 0.64 | 0.80 | |
Nor. throughput | 6.00 | 2.91 | 2.91 | > 0.07 | N/A | 0.8 GPS | |
Hardware efficiency (103 pels/s-gate) | 17.2 | 10.5 | 8.3 | > 1.4 | 12.8 | 28.4 | |
Nor. hardware efficiency (103 pels/s-gate) | 17.2 | 30.6 | 24.3 | > 2.1 | N/A | 29.5 |