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A Multiplierless DC-Blocker for Single-Bit Sigma-Delta Modulated Signals

EURASIP Journal on Advances in Signal Processing volume 2007, Article number: 018361 (2006) Cite this article

Abstract

The DC content in single-bit domain is both undesirable and hard to remove. In this paper we propose a single-bit multiplierless DC-blocker structure. The input is assumed to be sigma-delta modulated bitstream. This DC-blocker is designed using a delta modulator topology with a sigma-delta modulator (SDM) embedded in its feedback path. Its performance is investigated in terms of the overall signal-to-noise ratio, the effectiveness of DC removal, and the stability. The proposed structure is efficient for hardware realisation.

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Authors and Affiliations

  1. School of Electrical and Computer Engineering, RMIT University, Melbourne, Victoria, 3001, Australia

    Amin Z. Sadik & Zahir M. Hussain

  2. School of Engineering Systems, Queensland University of Technology, Brisbane, Qld, 4001, Australia

    Peter O'Shea

Authors
  1. Amin Z. Sadik
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  2. Zahir M. Hussain
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  3. Peter O'Shea
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Corresponding author

Correspondence to Amin Z. Sadik.

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Open Access This article is distributed under the terms of the Creative Commons Attribution 2.0 International License (https://doi.org/creativecommons.org/licenses/by/2.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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Sadik, A.Z., Hussain, Z.M. & O'Shea, P. A Multiplierless DC-Blocker for Single-Bit Sigma-Delta Modulated Signals. EURASIP J. Adv. Signal Process. 2007, 018361 (2006). https://doi.org/10.1155/2007/18361

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  • DOI: https://doi.org/10.1155/2007/18361

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