- Research Article
- Open Access
Efficient Lookup Table-Based Adaptive Baseband Predistortion Architecture for Memoryless Nonlinearity
© Seydou N. Ba et al. 2010
- Received: 24 November 2009
- Accepted: 14 May 2010
- Published: 13 June 2010
Digital predistortion is an effective means to compensate for the nonlinear effects of a memoryless system. In case of a cellular transmitter, a digital baseband predistorter can mitigate the undesirable nonlinear effects along the signal chain, particularly the nonlinear impairments in the radiofrequency (RF) amplifiers. To be practically feasible, the implementation complexity of the predistorter must be minimized so that it becomes a cost-effective solution for the resource-limited wireless handset. This paper proposes optimizations that facilitate the design of a low-cost high-performance adaptive digital baseband predistorter for memoryless systems. A comparative performance analysis of the amplitude and power lookup table (LUT) indexing schemes is presented. An optimized low-complexity amplitude approximation and its hardware synthesis results are also studied. An efficient LUT predistorter training algorithm that combines the fast convergence speed of the normalized least mean squares (NLMSs) with a small hardware footprint is proposed. Results of fixed-point simulations based on the measured nonlinear characteristics of an RF amplifier are presented.
- Less Mean Square
- Error Vector Magnitude
- Less Mean Square Algorithm
- Angular Interval
- Amplitude Approximation
High-efficiency RF amplifiers have nonlinear amplitude and phase transfer characteristics, which distort the transmitted signals, causing undesired out-of-band spectral regrowth and an increase in error vector magnitude (EVM) and bit error rate (BER). Digital baseband predistortion is an effective means to reconcile the conflicting requirements of linearity and power efficiency. For resource-limited low-cost handsets, the implementation complexity of the predistorter must be minimized. This paper proposes optimizations that facilitate the design of a cost-effective and high-performance adaptive digital baseband predistorter, while minimizing expensive factory calibration requirements. These attributes render this work highly desirable to meet the stringent linearity requirements of the modern third and fourth generation (3G/4G) wireless systems, which employ complex amplitude and phase domain modulations to achieve superior spectral efficiency .
While 2.5G EDGE and 3G WCDMA voice waveforms used simpler modulation schemes that exhibited less than dB of peak-to-average power ratio (PAPR), advanced WCDMA (or HSPA) waveforms exhibit PAPRs in excess of dB and modern 4G (LTE, WiMax) use more complex signal constellations resulting in PAPRs of up to 12 dB . Such a high PAPR mandates higher linearity requirements from the RF physical layer, which is in sharp contrast to the stronger demand for increased power efficiency and maximization of the handset battery life. These conflicting requirements can be tamed by resorting to the use of RF front-end amplifiers in their most power-efficient regime, while using signal predistortion schemes to achieve the desired linearity.
The nonlinear gain and phase distortions of RF amplifiers are a strong function of the envelope fluctuations in an RF signal [2, 3]. Consequently, most digital baseband predistorters are implemented as a function of the amplitude of the baseband input. In the case of the complex-gain lookup table (LUT) predistorter [4, 5], the most significant bits (MSBs) of the signal magnitude can be directly used to address the physical memory containing the LUT entries. For example, the first seven MSBs can be used to address an LUT with entries . The precise amplitude computation requires a square-root operation, which is not directly amenable to efficient hardware implementation, especially at very high processing rates. A square-root approximation proposed in  has a performance close to the ideal amplitude calculation. But in addition to the squared magnitude computation, the square-root approximation requires additional LUTs and a linear interpolation calculation. Other practical digital baseband predistorters  have been implemented as a function of the instantaneous envelope power , where is the inphase, is the quadrature component of the complex baseband signal. The resulting, but often unintended effect, is a concentration of the LUT entries around the higher amplitude region [7, 8]. This power indexing scheme is suitable for class-A and mild class-AB amplifiers since their characteristics are mostly linear until close to saturation. However, this is not well suited to amplifiers with higher power efficiency, such as deep class-AB, class-B, C, and E , which exhibit significant nonlinear amplitude and phase distortions across the entire amplitude range. A comparative performance analysis of the amplitude- and power-indexing schemes will be presented in this paper. A suitable low-complexity amplitude approximation for digital baseband predistorters is then applied. The proposed amplitude approximation has lower complexity than the squared magnitude computation and a performance that is close to the ideal amplitude-indexed LUT predistorter.
Furthermore, the nonlinear characteristics of power amplifiers can display significant variations when the operating temperature fluctuates and as the device ages. To maintain effectiveness of the predistorter and minimize residual distortions as well as calibration requirements, an adaptive predistorter [2, 10] must be used. This problem is further exacerbated by the high PAPR of the modern 3G/4G modulation waveforms. In this paper, an efficient least mean squares (LMS)-based  adaptation technique for LUT predistorters is presented as well as its optimization for low complexity hardware implementation.
Section 2 presents a comparative performance analysis between amplitude and power LUT indexing schemes and studies the design and implementation of a suitable amplitude approximation for digital baseband predistorters. Section 3 presents a low-complexity training approach for LUT-based complex-gain predistorters.
The indexing of a predistorter LUT with the squared signal magnitude is an attractive approach because of the relative ease of computation of . But it is reported in  that the magnitude indexing generally results in significantly better performance for a given LUT size. The performance gap is further exacerbated when the source signal is scaled for the purpose of power control. An LUT-based square-root approximation proposed in  has a performance that is close to the ideal amplitude calculation. In this section, we show that an accurate magnitude approximation for digital baseband predistorters, with lower hardware footprint, can be obtained directly from the inphase and quadrature components of the input signal.
Simple amplitude approximation techniques have been used for radar detection applications [12–15]. Most of the methods presented result in relatively coarse approximations, even though their precision is within the tolerance of the target applications. But since the digital baseband predistorter is located in the direct transmit path, such large amplitude approximation errors would severely limit the performance of the predistorter, resulting in both residual EVM degradation and spectral distortions.
In , the approximation accuracy is improved by further dividing the angular interval into two intervals, and using two different sets of coefficients , that are optimized for their corresponding angular intervals.
These results show that the use of three angular intervals is sufficient to decrease the mean square of the relative amplitude error below dB. This ensures that there is negligible transmit EVM and ACLR contribution due to the predistorter implementation. As shown by these results, an arbitrary amplitude approximation accuracy can be achieved by selecting a large enough number of angular intervals. But a larger number of angular intervals will result in a more complex decision process and the approximation is useful only if it is amenable to efficient implementation. It should be noted that the optimal coefficients obtained here are based on the assumption that the phase of the input signal is uniformly distributed. This assumption applies very well to most signal modulations. In the special case of a skewed phase probability density, the true optimal coefficients can be better approached using unequal angular intervals.
Amplitude approximation over three angular intervals: amplitude approximation coefficients and resulting relative amplitude errors for floating-point and fixed-point implementations.
EVM and ACLR performances of an LUT predistorter with amplitude versus power indexing; the input is WCDMA.
Nand2-equivalent gate count for power index computation and amplitude approximation.
I/Q resolution (bits)
It is clear from these results that the amplitude approximation design results in lower gate count for the input signal resolutions of interest ( 10 bits). The gap between the amplitude-indexing and power-indexing schemes increases rapidly as the resolution is increased from 8 to 14 bits. For input resolutions lower than 8 bits, the power computation results in a slightly lower gate count. But at such low resolutions, the performance is primarily limited by the I/Q signal quantization error. In this case, the resolution of the coefficients can be reduced down to 5 or 4 bits to further reduce the gate count of the amplitude approximation block. Typically, a baseband signal resolution of more than 10 bits is required to meet the close-in spectrum and waveform quality specifications over the entire power control dynamic range as per the standard's requirements. Therefore, the proposed amplitude approximation design has a clear advantage over the power indexing, both in terms of total design area and performance.
In , Cavers proposed the secant update for fast adaptation of complex-gain LUT predistorters. But its high computational complexity makes it unsuitable for hardware implementation.
The gradient definition in (18) is equivalent to separately deriving the LMS algorithm for the real and imaginary parts of the complex-gain predistorter, respectively . Considering one single interval at a time allows to simplify the problem by reducing it to finding an approximate inverse of the average amplifier complex gain within the considered interval. For each incoming feedback sample, only the corresponding entry that is addressed by its magnitude is updated. This process is similar to the partial update LMS [21, 22]. The update operation requires two complex multiplies (one to compute the error and one to evaluate the gradient), two additions and the scaling by , which can be simplified if it is restricted to powers of two. The update system is stable provided that , with being equal to for all falling in the th interval. If the LUT size is large, the samples can be assumed to have a uniform distribution across the interval. In this case, the expectation can be approximated by the square of the average magnitude, which is the point located at the center of the interval: .
For very low values of the system becomes susceptible to noise in the feedback path, with a potential to drive the update system into instability.
The scaling by the magnitude is an expensive operation that is not directly amenable to efficient hardware implementation.
The phase is therefore quantized to four possible values, that is, , thus effectively eliminating one complex multiplier (or four real multipliers).
It should be noted that this low complexity update is even simpler to realize in hardware than the regular LMS, which requires two complex multipliers and has a much slower convergence speed.
This low-complexity update method (LCNLMS) was simulated and compared to the LMS and the NLMS. The previously described class-E amplifier is used in this experiment and a 10 MHz LTE signal with a composite PAPR of 8.5 dB is used to train the feedback LUT in the indirect learning setup. The size of the complex-gain LUTs is set to entries. The complex-gain LUT entries are initially set to unity, which is functionally equivalent to bypassing the predistorter. The resolution of the inphase and quadrature (I/Q) signal components is set to 13 bits. To measure the sensitivity of the adaptation to noise, the feedback signal is corrupted by additive white Gaussian noise (AWGN) and has an SNR of 33 dB. The LUT is updated at a rate of 30.76 MHz and the overall simulation was run at a sampling rate of 61.52 MHz. The update coefficient for LMS and NMLS is set to . Comparing (21) and (24) shows that the LCNLMS intrinsically increases the update rate by a factor of . On the other hand, the biased quantization of in (26) approximately compensates for this factor. Therefore, setting for the LCNLMS ensures a fair comparison.
3.1. Updating a Linearly-Interpolated LUT
Therefore, even when the feedforward predistorter is chosen to be linearly interpolated, the nearest neighbor adaptation can be used in the update branch of the indirect learning architecture, without much performance penalty. Note that ZOH requires only one memory read and write for each data sample. On the other hand, the linearly interpolated adaptation requires two memory reads and writes per data sample, placing more stringent timing requirements on the adaptation hardware.
In this paper, an efficient LUT-based adaptive memoryless predistorter configuration, with minimized chip area, has been presented. An amplitude approximation scheme suitable for digital baseband predistorters is proposed. A closed-form solution is derived to determine the optimal parameters for the amplitude approximation using any arbitrary angular interval size. A quantized amplitude approximation with three angular intervals is implemented in VHDL and synthesized with the SYNOPSYS DESIGN COMPILER. The predistorter performance using the proposed area-efficient scheme is shown to be within dB of the ideal amplitude performance, while it outperforms the power-indexing in both design area and rejection of residual distortions by a wide margin.
An adaptation algorithm for complex-gain LUT predistorters based on the indirect learning architecture is also presented. The proposed adaptation algorithm has been optimized for efficient hardware implementation. It has a convergence speed that is comparable to the normalized LMS and lends itself to very efficient hardware implementation. The proposed optimized adaptive predistorter can be extended to mitigate memory effects by adding a linear time-invariant filter in cascade with the memoryless complex-gain predistorter [5, 30].
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