 Research
 Open Access
An orthogonal wavelet division multipleaccess processor architecture for LTEadvanced wireless/radiooverfiber systems over heterogeneous networks
 Chinmaya Mahapatra^{1}Email author,
 Victor CM Leung^{1} and
 Thanos Stouraitis^{2}
https://doi.org/10.1186/16876180201477
© Mahapatra et al.; licensee Springer. 2014
 Received: 27 November 2013
 Accepted: 12 May 2014
 Published: 28 May 2014
Abstract
The increase in internet traffic, number of users, and availability of mobile devices poses a challenge to wireless technologies. In longterm evolution (LTE) advanced system, heterogeneous networks (HetNet) using centralized coordinated multipoint (CoMP) transmitting radio over optical fibers (LTE AROF) have provided a feasible way of satisfying user demands. In this paper, an orthogonal wavelet division multipleaccess (OWDMA) processor architecture is proposed, which is shown to be better suited to LTE advanced systems as compared to orthogonal frequency division multiple access (OFDMA) as in LTE systems 3GPP rel.8 (3GPP, http://www.3gpp.org/DynaReport/36300.htm). ROF systems are a viable alternative to satisfy large data demands; hence, the performance in ROF systems is also evaluated. To validate the architecture, the circuit is designed and synthesized on a Xilinx vertex6 fieldprogrammable gate array (FPGA). The synthesis results show that the circuit performs with a clock period as short as 7.036 ns (i.e., a maximum clock frequency of 142.13 MHz) for transform size of 512. A pipelined version of the architecture reduces the power consumption by approximately 89%. We compare our architecture with similar available architectures for resource utilization and timing and provide performance comparison with OFDMA systems for various quality metrics of communication systems. The OWDMA architecture is found to perform better than OFDMA for bit error rate (BER) performance versus signaltonoise ratio (SNR) in wireless channel as well as ROF media. It also gives higher throughput and mitigates the bad effect of peaktoaveragepower ratio (PAPR).
Keywords
 Heterogeneous networks (HetNet)
 Coordinated multipoint (CoMP)
 LTE advanced radio over fiber (LTE AROF)
 Orthogonal wavelength division multipleaccess (OWDMA) processor
 Orthogonal frequency division multiple access (OFDMA)
 Xilinx vertex 6 FPGA
 Bit error rate (BER)
 Signaltonoise ratio (SNR)
 Peaktoaveragepower ratio (PAPR)
1 Introduction
The diversity of applications used over the internet has resulted in a demand for increased speed (data rate) over the network and a need for accommodating more users per unit area. This demand has urged research communities to provide greener and more costefficient networks. Several research studies have been conducted over the last decade, proposing costefficient broadband architectures. Today, nextgeneration longterm evolution (LTE) systems using radio signals over optical fibers are evolving towards centralized architectures, as a promising solution to meet the everincreasing demand for highspeed wireless connectivity. Centralized architectures, epitomized by micro base stations, femto and picocell basestation/accesspoint architectures, and mesh networking solutions have promised to provide several benefits, including reduced power consumption, enhanced radio spectrum utilization capacity, and diversity of nextgeneration wireless communication networks [1].
As radio spectrum is expensive and bandlimited, centralized LTE advancedradio over fiber (ROF) has attracted significant research interest. It focuses on the optimum construction and utilization of the hardware resources to cater an area of high traffic. A typical design uses optical fiber to move analog or digitized radiofrequency (RF) between the central facility and the remote sites [2]. Choosing optical fiber over conventional coaxial cables enables the usage of the enormous bandwidth provided by the fiber as well as almost errorfree transmission for short ranges in a metro area network (MAN). Softwaredefined radio (SDR) provides efficient, costeffective and easytohandle deployment architecture for the LTE AROF system. It follows a normal server/multiclient IT network and provides flexibility in architecture deployment. It also provides big savings of operational and infrastructure cost for service providers.
In the current LTE and WiFi systems, orthogonal frequency division multipleaccess (OFDMA) is the technology of choice [3]. OFDMA uses inverse fast Fourier transform (IFFT) at the transmitter and fast Fourier transform (FFT) at the receiver and allocates fixed resources to users for a given set of operating parameters. Despite its several advantages, if coupled with other components of the LTE A, the use of OFDMA increases the cost and utilization overhead of system resources. Moreover, it suffers from large implementation complexity, requiring a fixed allocation of resources to all the users, regardless of the present traffic as well as a high peaktoaveragepower ratio (PAPR) [4].
Orthogonal wavelet division multiple access (OWDMA) has been proposed as a viable alternative to OFDMA in communication systems. Previous work concentrated on digital video broadcast, and results were only plotted for the BPSK modulation scheme [5, 6]. Raajan et al. [7] provided bit error rate (BER) performance graphs for all the wavelets and modulation schemes, but no hardware architecture was provided for the proposed system. Similarly, Tao et al. [8] and Liew et al. [9] analyzed orthogonal wavelet division multiplexing (OWDM) for signaling over wideband linear timevarying channels (LTV) but, again, did not provide any architecture for deployment. 1D orthogonal wavelets have been used [10–14] for image processing applications.
The paper is organized in sections, where Section 3 provides a brief description of previous work, the definition of wavelet transform, and reasons for choosing 9/7 Daubechies lifting scheme for evolving the architecture. Section 4 describes the proposed OWDMA processor architecture and explains the different building blocks. In Section 5, pipelining is introduced in the architecture to reduce power consumption. Section 6 presents the synthesis and comparison results of resources and timing with other similar architectures. Section 7 gives the performance comparison for OWDMA and OFDMA, based on quality of constraint (QOS) metrics for LTE AROF systems. Finally, conclusions are offered in Section 8, followed by references.
2 Key contributions
A sequential outputbased parallel processing (SBPP) architecture for OWDM was proposed and evaluated for BER and PAPR [15]. Its deployment in LTE A future 3GPP rel.10 and above requires that its structure should be flexible enough to adapt according to channel conditions to different values of transform size in order to service uniformly the same number of users. The structure needs to accommodate both forward and inverse operations through a common control input. The architecture should be power efficient, easily controllable through a single control and should have inputoutput ports matching with other system subblocks that will satisfy the timing requirements of the whole system. Moreover, it is important for it to offer improved performance in terms of spectral efficiency (throughput), quality of service (better BER at the same signaltonoise ratio (SNR)) and should fit well in radiooverfiber systems. In this paper, an OWDMA architecture is developed that has significantly better performance, is easy to deploy, and consumes fewer resources than similar architecture available in the literature.
Analyzing the approaches described in [5–9] gives insight about the extensive research performed on the various solution approaches to problems of LTE OFDMA systems and provides proof that orthogonal wavelets are a better and viable alternative to the existing wireless systems. Although the analysis and evaluations were done for BER and PAPR, it lacks in a unified system implementation, resource analysis, and thorough performance evaluation for current LTE systems. Our major contribution in this paper is to deal with these shortcomings in the present knowledge and present an overall system level solution. Moreover, we also provide performance analysis for optical fiber medium.
3 Orthogonal wavelet division multiplexing
where t is the time, ψ(t) is the basic (or mother wavelet), and ψ((t − τ)/a) is the translated baby wavelet [6] created by either stretching or compressing the mother wavelet.
3.1 Formulation of OWDM from the 9/7 filter using lifting
From the CWT, it is possible to construct the discrete wavelet transform (DWT) and the inverse DWT) from banks of matched highpass filters (HPF) and lowpass filter (LPF) [18]. Single carrier systems tend to have high bit rates but low frequency resolution, whereas OFDM has many sublevels, each transferring at a low bit rate. Since the wavelet transform contains both time and frequency information, it is possible to effectively send different data rates in different sublevels, according to channel conditions. When considering the DWT, there are a number of mother wavelet families that need to be evaluated. To replace OFDM systems in a multipath environment having carrier and symbol interference, the wavelets need to be orthogonal and periodical. Also, the realization using discrete structures is important for purpose of implementation. Therefore, only three families of wavelet satisfy all the abovementioned constraints: Daubechies, Symlet, and Coiflet [19].
The lifting scheme is used for the development of the architecture for a 9/7 Daubechies 1D wavelet filter with two stages of lifting (N = 2), i.e., predict1 and update1, followed by predict2 and update2 in a second stage, followed by scaling [20, 21]. The basic idea of the lifting scheme is first to compute a trivial wavelet (or lazy wavelet transform) by splitting the original 1D signal into odd and evenindexed subsequences and then modify their values using alternating prediction and updating steps [22, 23]. The lifting algorithm consists of the following three steps:

Split step
The original signal, X(n), is split into odd and even samples (lazy wavelet transform).

Lifting step
This step is executed as N substeps (depending on the type of the filter), where the odd and even samples are alternatingly filtered by the prediction and update filters.

Scaling step
After N lifting steps, scaling coefficients K and 1/K are applied, respectively, on the odd and even samples, in order to obtain the lowpass band and the highpass subband.
Orthogonal wavelet division multiple access (OWDMA) is a system, in which the wavelet domain is used to separate the subband components in the same way as OFDMA. The big difference between OFDMA and OWDMA is that in OFDMA, the FFT performs subband decomposition with a specific number of subbands at welldefined intervals, while OWDMA may dynamically allocate the number of subbands and the bandwidth of each [24].
4 OWDMA processor architecture for LTE A and LTE AROF
From the SBPPOWDM scheme presented in the previous section, it is found that the final scaling and dilation coefficients are interdependent on predict and update outputs at each stage; thus, there is a delay and it also affects throughput. The structure requires two update and predict blocks to be implemented. OWDMA scheme requires that the structure should be flexible enough to adapt to different values of N, according to the channel conditions. The structure needs to accommodate both forward and inverse operations through a common control. The multiplicative coefficients for the filter need to be stored in a hardwarefriendly format which will reduce the number of multiplication operations. Thus, a new OWDMA processor architecture has been developed that caters to all the requirements of a multipleaccess system mentioned above. Moreover, parallelism is exploited in the architecture, along with pipelining, to formulate an efficient, lowpower, and resourcefriendly processor.
4.1 Scheduler
The proposed OWDMA processor can be interfaced with the scheduler, according to the scheme presented Figure 3. In this scheme, the scheduler communicates with the OWDMA processor using a set of dedicated handshaking signals. The scheduler acts as the master, sets the address of the processor, and provides clock to it (CLK). First, the scheduler requests the control unit block to initiate a new transform using the START signal. The controller unit sets the BUSY signal low, if it is ready to start the process for the new transform, or high, if it is in the middle of an already continuing process. When the controller is ready, it sends a data request (D_REQ) signal to the scheduler, which then responds with the input data. If the controller correctly gets the input, it sends an acknowledgement (ACK) signal; otherwise, it sends $\overline{\mathrm{NACK}}$, and the scheduler retransmits. Along with the data input, it sends the information for the size of OWDM (N_OWDM) as well as the forward/inverse operation ($\mathrm{FW}/\overline{\mathrm{INV}}$) signal. The OWDMA processor uses the RST signal to indicate the end of data, when it completes the transform. At the same time, it sets the BUSY signal low to indicate to the scheduler that it is ready to start a new transform.
4.2 Core unit
4.3 Control unit
The control unit consists of two separate logic units for forward and inverse computation and is implemented using a finite state machine having five states: S0, S1, S2, S3, and S4. It toggles on the positive CLK edge input, and at each state, the output controls IN_EN, G1_EN, G2_EN, OUT_EN, FW/$\overline{\mathrm{INV}}$, _COEF_EN (0/1), and $\mathrm{FW}/\overline{\mathrm{INV}}$. The $\mathrm{FW}/\overline{\mathrm{INV}}$ signal controls which control the logic unit is to be used (forward or inverse). G1_EN and G2_EN are gate control switches that switch inputs for the delay registers at the boundary conditions.
4.4 Coefficient generator unit
The coefficient generator block is a memory block that contains the odd and even filter coefficients to be multiplied during forward/inverse operation. Providing the appropriate constant to the multiplier, it implements the desired multiplication. The width of the multipliers is determined by the accuracy of the constants and the data path bitwidth. The drawback of the above implementation is that the multipliers occupy a great amount of area and restrict the throughput of the processing unit. Using shiftadd operations to replace the multiplications with constants optimizes the above implementation and results in an improved processing block.
Forward odd coefficients
Index  Q.15 format  Binary format 

FO_{ C }(1)  −1,240  1111101100101000 
FO_{ C }(2)  781  0000001100001101 
FO_{ C }(3)  9,956  0010011011100100 
FO_{ C }(4)  −16,358  1100000000011010 
FO_{ C }(5)  30,031  0111010101001111 
FO_{ C }(6)  −16,358  1100000000011010 
FO_{ C }(7)  9,956  0010011011100100 
FO_{ C }(8)  781  0000001100001101 
FO_{ C }(9)  −1,240  1111101100101000 
Forward even coefficients
Index  Q.15 format  Binary format 

FE_{ C }(1)  2,115  0000100001000011 
FE_{ C }(2)  −1,333  1111101011001011 
FE_{ C }(3)  −13,700  1100101001111100 
FE_{ C }(4)  25,837  0110010011101101 
FE_{ C }(5)  −13,700  1100101001111100 
FE_{ C }(6)  −1,333  1111101011001011 
FE_{ C }(7)  2,115  0000100001000011 
5 Pipelining the parallel architecture
6 Performance results and comparisons
6.1 Synthesis of the proposed architecture and resource utilization
In order to evaluate the performance of the architecture, it is required to make use of certain metrics that characterize the architecture in terms of the hardware resources used and the computation time. The hardware resources used for filtering are measured by the number of multipliers an number of adders, while those used for the storage of data and filter coefficients are measured by the number of registers. In general, the computation time is technology dependent. However, a metric that is technology independent and can be used to determine the computation time (T) is the number of clock cycles (N_{CLK}) elapsed between the first and the last samples inputted to the architecture. Assuming that the clock period is T_{c}, the total computation time can then be obtained as T = N_{CLK} × T_{c}.
FPGA resource summary for OWDMA
Resource  Used  Percentage 

CLB slices  959  6 
Flipflop slices  653  1 
DSP 48's  32  11 
IOBs  180  75 
BRAMs  3  2 
The implemented circuit is found to perform well with a clock period as short as 7.036 ns (i.e., a maximum clock frequency of 142.13 MHz) for a transform size of N = 512. By replacing the values of V_{CC}, V_{t}, L, and M in (18) and (19), it can be found out that the power consumption on the chip on which the circuit is implemented is reduced by a factor of (1/9). The new power usage is only 143 mW per antenna.
6.2 Comparison with other architectures
Comparison between various 1D architectures
Architecture  N(size of computation)  No. of CLB slices  F max (MHz)  Time (μs)  Area/speed ratio  Filter type 

Recursive architecture [7]  512  439  50  10.25  8.78  1D (9/7) 
Symmetrically extended [8]  512  1,279  44.1  8.36  29  1D 
Parallel FDWT [9]  512  850  171.8  2.98  4.95  1D (9/7) 
Pipelined [10]  512  785  85.49  6  9.18  1D 
Arch1DII [11]  512  921  136  1.88  6.77  1D (9/7) 
Proposed OWDMA processor  512  959  142.13  1.82  6.75  1D (9/7) 
Comparison of resource utilization for OFDMA and OWDMA processors
Technique  Architecture  N(size of computation)  No. of CLB slices  No. of LUT slices  BRAM  DSP slices  Time (μs) 

OFDMA processing  R2  256  842  650  3  3  4.18 
R2L  1,000  1,025  839  3  3  31.58  
R2  1,106  882  3  6  18.63  
R2L  2,000  1,137  882  5  3  66.74  
R2  1,082  952  5  6  39.41  
Proposed OWDMA processing  Parallel and pipelined  256  614  355  3  32  0.91 
Parallel and pipelined  1,000  1,338  1,042  3  32  3.61  
Parallel and pipelined  2,000  1,160  848  5  32  7.26 
7 Quality comparison in 4G LTE A/LTE AROF system
Figure 8b,c shows the transmitter and receiver units, respectively, of the proposed architecture. In the first step of the transmitter processing, the user data are generated, depending on the previous acknowledgement (ACK) signal. If the previous user data transport block (TB) was not acknowledged, the stored TB is retransmitted using a hybrid automatic repeat request (HARQ) scheme. Then, a cyclic redundancy check (CRC) is calculated and appended to each user's TB. The data of each user are independently encoded using a turbo encoder with quadrature permutation polynomial (QPP)based interleaving [29]. Each block of coded bits is then interleaved and ratematched with a target rate, depending on the received channel quality indicator (CQI) user feedback. The encoding process is followed by data modulation, which maps the channelencoded TB to complex modulation symbols. Depending on the CQI, a modulation scheme is selected for the corresponding resource block. Modulation schemes used for downlinkshared channel (DLSCH) here are QPSK, 16QAM, and 64QAM. The modulated transmit symbols are then mapped to a multipleinput and multipleoutput (MIMO) precoding matrix. The optimum precoding matrix is selected from a code book, depending on the precoding control information (PCI) that is fed back from the user equipment (UE) to the transmitter. Finally, the individual symbols to be transmitted are mapped to the resource elements. Downlink reference symbols and synchronization symbols are also inserted into the OFDM/OWDM timefrequency grid. The assignment of a set of resource blocks (RBs) to UEs is carried out by the scheduler based on the CQI reports from the UEs.The receiver structure is shown in Figure 8c. Each UE receives the signal transmitted by the evolved node B (eNB) and performs the reverse physicallayer processing of the transmitter. First, the receiver has to identify the RBs that carry its designated information. The estimation of the channel is performed using the reference signals available in the resource grid. Based on this channel estimation, the quality of the channel may be evaluated, and the appropriate feedback information calculated. The channel knowledge is also used for the demodulation and soft decoding of the OFDM/OWDM signal. In case of MIMO, a MMSE decoder is used. Finally, the UE performs HARQ combining and channel decoding. In order to cut down the processing time after the end of every turbo iteration, a CRC check of the decoded block is performed and, if correct, decoding is stopped.
The path from UE to RAU, i.e., the uplink uses single carrierfrequency division multiple access (SCFDMA) as OFDM, has high PAPR. High PAPR requires expensive and inefficient power amplifiers with high requirements on linearity, which increases the cost of the user terminal and also drains the battery faster. Since OWDM has better PAPR, it can be used in the uplink as well.
7.1 Bit error rate comparison
Using the above system model, standard QoS parameters BER and throughput have been compared for OFDM and OWDM architectures. In addition, a performance evaluation of radio over singlemode fiber system using coded OFDM and OWDM and the relation of fiber length with BER is discussed. A comparison is also drawn between peaktoaveragepower ratio in the two systems.
Simulation parameters
Parameter  Value 

Channel bandwidth  20 MHz 
Modulation schemes  QPSK, 16QAM, 64QAM 
Multiple access architectures  OWDMA/OFDMA 
N (size of computation)  1,024 
Error control code  Rate1/2 turbo codes 
Channel model  ITU extended pedestrian A model (EPA) with f_{d} = 5 Hz 
Fiber parameters in optical link
Parameter  Value 

Type of fiber  Singlemode NZDSF 
Fiber wavelength  1.55 μm 
Fiber dispersion  4 ps/nm/km 
Fiber attenuation  0.21 dB/km 
Frequency spacing  50 GHz 
Optical probe power  15 dBm 
Span length  1, 8, and 12 km 
We find that there is no significant degradation on the BER performance until the fiber length becomes 12 km, due to considerable modal dispersion. OWDMA shows slightly better performance as compared to the OFDMA system. This shows that the OWDMROF system ensures high service availability over long distances up to 8 km, which came in accordance with standard distances between the indoor (baseband) and outdoor (radio) units.
7.2 Throughput of the OWDMA system
It is well known that multiplication in the DFT domain corresponds to the circular convolution in the time domain. In order to achieve circular convolution using linear convolution, we must add a prefix that is the ‘cyclic prefix’ onto the transmitted signal. This cyclic prefix makes the linear convolution appear as a circular convolution and represents a loss in the achievable data rate that becomes significant in the highly fading channels. But in the case of OWDM that uses wavelet transform, the operations involve shift and multiply operations with filter coefficients. The shift by two for subsequent pairs of rows produces a downsampling operation within the matrix transformation and also makes the matrix orthogonal and circulant [31]. Therefore, a cyclic prefix is not required in the case of OWDM. This gives a significant throughput advantage particularly in highly dispersive channels.
7.3 Peakaveragetopower ratio
8 Conclusion
In this paper, we have developed a flexible, hardwarefriendly, and lowpower OWDMA architecture design for deployment in ROF systems having LTEadvanced configuration. The key contribution of the paper is the architecture derived for a LTE AROF system with an interface of input and output ports that can replace the OFDMA block offering added benefits.
We first derived an architecture based on previous 9/7 lifting scheme wavelet filters. The computation of the method is described using filters, controller, and paralleltoserial units. The scheduler is also implemented for easy interfacing of the subblock with other blocks of the system. The architecture is validated on a centralized processor having Xilinx Virtex6 FPGAs at N = 512. We compare our architecture with various other 1D 9/7 wavelets available in the literature as well with existing OFDMA implementations. We also compute the quality parameters BER, throughput, and PAPR for OWDMA and compare them with the existing OFDMA systems.
We found that our architecture runs at a speed of 142.13 MHz, consuming only 143 mW of power per antenna. It is better, in terms of resource consumption, as compared to other similar 1D 9/7 implementations. We also found that it is also significantly better than OFDMA systems in terms of resource utilization and BER, throughput, and PAPR performance for ROF systems. Hence, it is shown that the OWDMA systems are well suited for high data rate communications and also can accommodate more users.
Declarations
Acknowledgements
Research performed and documented in this thesis was supported by the Canadian Natural Sciences and Engineering Research Council (NSERC) through grant STPGP 396756.
Authors’ Affiliations
References
 Haoming L, Hajipour J, Attar A, Leung VCM: Efficient HetNet implementation using broadband wireless access with fiberconnected massively distributed antennas architecture. Wirel. Comm. IEEE. 2011, 18(3):7278.View ArticleGoogle Scholar
 Attar A, Haoming L, Leung VCM: Green last mile: how fiber connected massively distributed antenna systems can save energy. Wirel. Comm. IEEE 2011, 18(5):6674.View ArticleGoogle Scholar
 3GPP: Technical specification group radio access network; (EUTRA) and (EUTRAN); overall description; stage 2. 2008. . Accessed 26 Nov 2013 http://www.3gpp.org/DynaReport/36300.htmGoogle Scholar
 Jiang T, Imai Y: An overview: peaktoaverage power ratio reduction techniques for OFDM signals. IEEE Trans. Wirel. Comm. 2008, 57: 5657.Google Scholar
 Linfoot SL: Wavelet families for orthogonal wavelet division multiplex. Electron. Lett. 2008, 44(18):11011102. 10.1049/el:20081681View ArticleGoogle Scholar
 Linfoot SL, Ibrahim MK, AlAkaidi MM: Orthogonal wavelet division multiplex: an alternative to OFDM. Consum. Electron. IEEE Trans. 2007, 53(2):278284.View ArticleGoogle Scholar
 Raajan NR, Monisha B, Kumar MR, Philomina AJ, Priya MV, Parthiban D, Suganya S: Design and implementation of orthogonal wavelet division multiplexing (OHWDM) with minimum bit error rate. Paper presented at the 3rd international conference on trends in information sciences and computing (TISC), Chennai; 2011:122127.Google Scholar
 Tao X, Leus G, Mitra U: Orthogonal wavelet division multiplexing for wideband timevarying channels. Paper presented at the IEEE international conference on acoustics, speech and signal processing (ICASSP), Prague; 2011:35563559.Google Scholar
 Liew BA, Berber SM, Sandhu GS: Performance of a multiple access orthogonal wavelet division multiplexing system. Volume 2. Paper presented at the third international conference on information technology and applications (ICITA), Sydney; 2005:350353.Google Scholar
 Liao HY, Mandal MK, Cockburn BF: Efficient architectures for 1D and 2D liftingbased wavelet transforms. IEEE Trans. Signal Process. 2004, 52(5):13151326. 10.1109/TSP.2004.826175MathSciNetView ArticleGoogle Scholar
 McCanny P, Masud S, McCanny J: Design and implementation of the symmetrically extended 2D wavelet transform. ICASSP 2002, 3: 31083111.Google Scholar
 Raghunath S, Aziz SM: High speed area efficient multiresolution 2D 9/7 filter DWT processor. Paper presented at the IFIP international conference on very large scale integration, Nice; 2006:210215.Google Scholar
 Masud S, McCanny J: Reusable silicon IP cores for discrete wavelet transform applications. IEEE Trans. Circuits Syst. I, Reg. Papers1 2004, 51(6):11141124. 10.1109/TCSI.2004.829236View ArticleGoogle Scholar
 Uzun IS, Amira A: Rapid prototyping—framework for FPGA based discrete biorthogonal wavelet transforms implementation. IEEE Vision Image Signal Process 2006, 153(6):721734. 10.1049/ipvis:20045080View ArticleGoogle Scholar
 Mahapatra C, Ramakrishnan A, Stouraitis T, Leung VCM: A novel implementation of sequential output based parallel processing  orthogonal wavelet division multiplexing for DAS on SDR platform. Paper presented at the 19th IEEE international conference on electronics, circuits and systems (ICECS), Seville; 2012:320323.Google Scholar
 Chan YT: Wavelet Basics. Kluwer Academic Publishers, Dordrecht; 1994.Google Scholar
 Daubechies I: Ten Lectures on Wavelets. 3rd edition. SIAM, Philadelphia; 1994.MATHGoogle Scholar
 Mallat SG: A theory for multiresolution signal decomposition: the wavelet representation. IEEE Trans. Pattern Anal. Machine Intell. 1989, 11(7):674693. 10.1109/34.192463View ArticleMATHGoogle Scholar
 Linfoot SL: A study of different wavelets in orthogonal wavelet division multiplex for DVBT. IEEE Trans. Consum. Electron. 2008, 54(3):10421047.View ArticleGoogle Scholar
 Jamin A, Mahonen P: Wavelet packet modulation for wireless communications. J. Wirel. Commun. Mob. Comput. 2005, 5(2):123137. 10.1002/wcm.201View ArticleGoogle Scholar
 Cheng C, Parhi KK: Highspeed VLSI implementation of 2D discrete wavelet transform. Signal Process. IEEE Trans. 2008, 56(1):393403.MathSciNetView ArticleGoogle Scholar
 Sweldens W, Daubechies I: Factoring wavelet transforms into lifting steps. J. Fourier Anal. Appl. 1998, 4: 247270. 10.1007/BF02476026MathSciNetView ArticleMATHGoogle Scholar
 Sweldens W: Lifting scheme: a new philosophy in biorthogonal wavelet constructions. In Proceedings of the SPIE Conference on Wavelet Application in Signal and Image Processing III. Volume 2569. Edited by: Laine AF, Unser M. SPIE, Bellingham; 1995:6879. 10.1117/12.217619View ArticleGoogle Scholar
 Akansu N, Medley MJ: Wavelet and subband transforms: fundamentals and communication application. IEEE Commun. Mag. 1997, 35: 104115.View ArticleGoogle Scholar
 Qi W, Vrudhula SBK: An investigation of power delay tradeoffs for dual Vt CMOS circuits. Paper presented at the international conference on computer design (ICCD), Austin; 1999:556562.Google Scholar
 Zhang C, Wang C, Ahmad MO: A pipelined VLSI architecture for highspeed computation of the 1D discrete wavelet transform. IEEE Trans. Circuits Syst. I, Reg. Papers1 2010, 57(10):27292740.MathSciNetView ArticleGoogle Scholar
 Lin YW, Lee CY: Design of an FFT/IFFT processor for MIMO OFDM systems. IEEE Trans. Circuits Syst. I, Reg. Papers1 2007, 54(4):807815.MathSciNetView ArticleGoogle Scholar
 Liu H, Lee H: A high performance fourparallel 128/64point radix24 FFT/IFFT processor for MIMOOFDM systems. Paper presented at the IEEE Asia Pacific conference on circuits and systems, Macao; 2008:834837.Google Scholar
 3GPP: Technical specification group radio access network; evolved universal terrestrial radio access (EUTRA); multiplexing and channel coding (release 8). 2008. . Accessed 26 Nov 2013 http://www.3gpp.org/ftp/Specs/archive/36_series/36.212/Google Scholar
 Mahboob S, Mahapatra C, Leung VCM: EnergyEfficient Multiuser MIMO Downlink Transmissions in Massively Distributed Antenna Systems with Predefined Capacity Constraints. Paper presented at the seventh international conference on broadband, wireless computing, communication and applications (BWCCA), Victoria, Canada; 2012:208211.Google Scholar
 Dilmaghani R, Ghavami M: Comparison between waveletbased and Fourierbased multicarrier UWB systems. Commun. IET 2008, 2(2):353358. 10.1049/ietcom:20070181View ArticleGoogle Scholar
Copyright
This article is published under license to BioMed Central Ltd. This is an Open Access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/2.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly credited.